Workshop on 3D Integration for Future High Performance Computer Architecture

3D integrated circuits are attractive options for overcoming the barriers in interconnect scaling, offering an opportunity to continue the complementary metal-oxide-semiconductor performance trend. This workshop brings together researchers, practitioners, and industry experts to exchange ideas and discuss the latest state-of-the-art innovations and future challenges.


Senior Personnel: Prof. Hai (Helen) Li (PI), Jonathan Chao (co-PI), and Yuan Xie (co-PI)
Sponsors: New York University Abu Dhabi
Team Members:  N/A
Collaborators:  N/A
Performance Date: 04/18/2012 – 04/19/2012


Related Publications:          N/A