CAREER: Centaur: A Bio-inspired Ultra Low-Power Hybrid Embedded Computing Engine Beyond One TeraFlops/Watt

The objective of the research is to innovate an embedded computing engine named “Centaur” to achieve ultra-high power efficiency by adopting the bio-inspired computation model and the advanced memristor technology.

Three constituent elements are included to address the major technical obstacles: (1) The power-efficient hybrid computing system that integrates memristor-based synapse network and crossbar structure, targeting the flexible and intensive data processing, respectively. (2) The robust design methodology for Centaur, including the circuit and algorithm enhancements as well as the necessary EDA flow. (3) The integration of Centaur into modern heterogeneous systems and the prototype demonstration. Creative applications of critical importance to nowadays mobile and embedded systems by taking the full advantages of Centaur, including pattern recognition and video and image processing, will be also explored.

The research can benefit the embedded system community by the revolutions in computing architecture and hardware design for functional variety, power-efficiency, and cost. The results can further benefit the semiconductor and neuromorphic societies at large by stimulating the interaction between the advances in device engineering and computing models.

 

Senior Personnel: Prof. Yiran Chen (PI)
Sponsors: National Science Foundation
Team Members: Beiye Liu, Xiaoxiao Liu, and Mengjie Mao
Collaborators: Prof. Hao Jiang, San Francisco State University 

Dr. Qing Wu, U.S. Air Force Research Lab

Dr. Jianhua Yang, HP Labs

Prof. Yu Wang, Tsinghua University

 Starting Date:  06/01/2013

Related Publications:

[In Press]

[2014]

[TNNLS]

M. Hu, H. Li, Y. Chen, Q. Wu, G. Rose, and R. Linderman, “Memristor Crossbar Based Neuromorphic Computing System: A Case Study,” IEEE Transactions on Neural Networks and Learning Systems (TNNLS), vol. 25, no 10, pp. 1864-1878, Oct. 2014. DOI: 10.1109/TNNLS.2013.2296777.download-icon

[HPEC]
X. Liu, M. Mao, H. Li, Y. Chen, H. Jiang, J. Yang, Q. Wu, and M. Barnell, “A Heterogeneous Computing System with Memristor-based Neuromorphic Accelerators,” IEEE High Performance Extreme Computing Conference (HPEC), Sep. 2014, to appear.

[2013]

[DAC]
B. Liu, M. Hu, H. Li, Z.-H. Mao, Y. Chen, T. Huang, and W. Zhang, “Digital-Assisted Noise Eliminating Training for Memristor Crossbar-based Analog Neuromorphic Computing Engine,” Design Automation Conference (DAC), Jun. 2013, Article 7. DOI: 10.1145/2463209.2488741.download-icon

[CODES+ISSS]
B. Liu, M. Hu, H. Li, Y. Chen, and J. Xue, “Bio-Inspired Ultra Lower-Power Neuromorphic Computing Engine for Embedded Systems,” International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS), Oct. 2013, pp. 1. DOI: 10.1109/CODES-ISSS.2013.6659010. (Invited)download-icon